Effect of Power Plane Inductance on Power Delivery Networks

Wed. January 30| 9:00 AM - 9:45 AM | Ballroom E

Pass Type: 2-Day Pass, All Access Pass, Alumni All Access Pass

Track: 11. Power Integrity in Power Distribution Networks

Audience Level: All

Session Type: Technical Session

Description: Power plane loop inductance is an important metric in Power Delivery Network (PDN) design, but it is not easy to visualize how PCB design changes impact a power plane's loop inductance. This paper considers the impact on loop inductance of common power plane design changes such as the placement of vias, the anti-pad pitch and periodicity in a pin field array, and the placement of decoupling capacitors. The analysis considers tradeoffs of parametric values and provides guidance to engineers for PDN designs that meet a desired frequency response, minimize ground bounce, and reduce coupling due to power plane loop inductance.

Takeaway: This paper considers design tradeoffs that impact power plane loop inductance including changes to vias, anti-pads, and decoupling capacitors. Knowledge of these tradeoffs will help engineers understand how PCB design changes will impact a power plane's loop inductance and ultimately help them achieve robust electrical performance.


Speakers

Shirin Farrahi

Shirin Farrahi

Principal Software Engineer

Cadence Design Systems

Role: Speaker

Mehdi Mechaik

Mehdi Mechaik

Staff Application Engineer

Cadence Design Systems

Role: Speaker

Ethan Koether

Ethan Koether

Hardware Engineer

Oracle

Role: Author

Istvan Novak

Istvan Novak

Samtec

Role: Author