Tutorial – Advanced IBIS-AMI Techniques for 32 GT/s & Beyond

Tue. January 29| 9:00 AM - 11:50 AM | Ballroom A

Pass Type: All Access Pass, Alumni All Access Pass

Track: 02. Chip I/O & Functional Block Modeling & Validation Solutions

Audience Level: Advanced

Session Type: Tutorial

Description: IBIS-AMI is a cornerstone for designing serial interfaces like PCI Express Gen 5, which are sensitive to mistakes on the order of 2 ps. Our tutorial will cover advanced topics that deepen the user's understanding of modeling to this level of accuracy. How does clock data recovery work in PAM4 with three separate eyes? Do the simulator and the hardware use the same technique to search for optimum equalizer settings? How do the TX and RX interact during back-channel optimization? What are the differences between TX and RX random jitter?

Takeaway: Attendees of this tutorial can expect to gain a deeper understanding of the functional behavior of SerDes adaptive equalization and clock data recovery circuits, how the model represents these circuits, and how the simulator treats the model parameters.


Speakers

Greg Edlund

Greg Edlund

Senior Engineer

IBM

Role: Speaker

Kumar Keshavan

Kumar Keshavan

Software Architect

Cadence Design Systems, Inc.

Role: Speaker

Mehdi Mechaik

Mehdi Mechaik

Staff Application Engineer

Cadence Design Systems, Inc.

Role: Speaker

Ambrish Varma

Ambrish Varma

Senior Principal Software Engineer

Cadence Design Systems

Role: Speaker

Ken Willis

Ken Willis

Product Engineering Architect

Cadence Design Systems

Role: Speaker